Computer commanded Dual Forward Reverse speed controllers

JUMPERS: The jumpers are factory set in the parked OFF position for the most popular mode which IGNOREs the device select line and utilizes a 338 Hz PWM chop frequency. Install JP1 closed to select the 21.6KHz rate: be advised this higher chop rate will generate more RFI and may require RFI filters.

JP2 and JP3 establish the operation of the DEVICE SELECT line. Most applications use only one CDFR to an 8 bit port and thus use the IGNORE position. The other two possibilities are active high and active low. Without any additional hardware two CDFRs can be commanded by one port and a 9th signal to drive the SELECT. On a PC port special software manipulation of the handshake lines can drive the DEVICE SELECT since they are not normally used to talk to the CDFR. With two 8 bit ports eight CDFR's may be commanded still without extra hardware. Add simple de-multiplexing logic to yield up to 256 CDFR's under the control of two ports. JP4-JP8 are not used in this product. OFF=parked. Jumper ON=installed =present= closed.

IBM PC PRINTER PORT: The CDFR parallel interface is compatible with an IBM compatible PC's printer port except that the handshaking lines are not used. Like a printer, commands are clocked into the CDFR on the falling edge of the \STROBE line, including the DEVICE SELECT if used. Set up time for the data prior to the \STROBE's fall is 0.1us and the data hold time is 0.5us. The \STROBE itself must be low for a minimum of 0.2us. If you use BASIC's LPRINT command please tie Busy, PaperEnd and SelectIn low to ground via a 100 ohm resistor.

Speed of your motor is by direct command of the PWM duty cycle (open loop control) with data bits D0 (LSB) through D5 to provide 61 even steps between 0% and 100%. Bit D6 controls motor direction and D7 determines which motor is commanded. There are four commands for 0%=off which control   electro-dynamic braking and the optional mechanical brake release.   By alternately commanding the proper pair of "off" codes your computer can vary the braking duty cycle.  Most applications program a brake ramp of 0-100% duty cycle motor shunting. Alternate D6=0 & 1 while holding D0=1 at a maximum chop rate of 900 HZ. Interlace the commands to both motors for simultaneous braking. The braking scheme sacrifices very low duty cycle commands that are below a practical operating point for most motors.

The test programs used by VANTEC are available only on our WebSite under Applications, Manuals and Software; CDFRLPT1.BAS for LPT1 as QuickBasic 4.5 text readable, CDFRLPT1.EXE as executable version   and CDFRLPT2.EXE as LPT2 executable. Inspection of the .BASic source code is helpful to understand operation. Although these test programs run fine on our computer under the Win95 DOS re-boot, please understand that machines and ports vary widely so these test programs may or may not run on your computer. We do not support them.

OPTIONAL MECHANICAL BRAKE RELEASE or CLUTCH ENGAGEMENT: The other braking combinations using D0 allow for command of the optional mechanical brake output. It provides a 2 amp output current sink that turns on when there's a command for motion. With a stop command it goes off after a short delay. Connect at the single terminal block connection BRK. Install a flyback diode across your coil to protect the CDFR.

WIRING: Use proper static precautions while wiring; particularly the parallel data interface. Follow the layout schematic. Do not power the CDFR from batteries under charge, battery eliminators or chargers without consulting factory.

POWER & MOTOR: Observe battery polarity. The SPEC CHART shows the minimum size wire for the battery power and motor wiring; it is the size to use for each of the double wires. You must use double wiring to the Ma1, Mb1, Ma2, Mb2, +1 and +2 nodes on the handy plug in terminal block. We recommend you run the double wires all the way to their termination point; for example; the motor terminals. Screw torque will effect the connection resistance so tighten them! We have provided 4 connection screws for the ground node. Use all four as a massive parallel GROUND per the wire size indicated in the SPEC CHART. There are modes (perhaps going forward in your project!) where all the current of your two starting motors goes through the ground!

Wire with the minimum length wire practical and keep this wiring separated from the computer and parallel data interface. Ground your chassis at a single point but don't use the chassis to conduct current. Use separate regular-blow fuses to feed the +1 and +2 power terminals; select the smallest fuse which will support your normal operation but no larger than rated surge current. Install a .001ufd ceramic disc capacitor directly across each motors brushes and between each brush and their motor case for RFI protection.

PARALLEL DATA INTERFACE: Noise in the command data lines will result in improper operation. Use a #18 or equivalent in combined conductors for the ground; for example: some ribbon cable schemes use a ground for every other wire. Longer runs and FCC requirements may indicate shielded cable. Use the minimum length wire practical and don't bundle it with other data or power wiring. These CDFR models have a common ground between the logic and the power circuitry; use caution to avoid ground loops. Any circuit paths, including unintentional sneak path, that forces the ground between your computer and the CDFR to conduct current will modulate noise onto the data. We recommend initial testing and learning operation of the unit on a test bench with a completely separate motor battery running small unloaded test motors. Guard against static.

The parallel interface is a 24 pin DIP socket typically used for 24 pin Skinny-DIP Integrated Circuits like the 87C751.  It's pins are numbered like an IC with pin 1 through pin 12 down one side and pin 13 through pin 24 up the other side such that pin 1 and pin 24 are right across the .300" width from each other, at the notched end as indicated by the white printed nomenclature.  The socket is labeled U6 at the notch end and pin 1 is adjacent to the U in U6.

MOUNTING: Don't mount the unit directly adjacent to your computer. Simultaneous operation of both halves at maximum ratings may require additional cooling air or mounting the CDFR side-opposite-the-terminal-block to additional heat sinking. Usually the metal frame of your project is sufficient. No special heatsinks are required. While mounting remove the cover to monitor the mounting screw length; screw should not thread into the case move than 1/8".

The CDFR has a limited one-year warranty based upon a nominal repair charge for units not tampered with or abused. Details available in Ordering.